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TMCNet:  U.S. Patents Awarded to Inventors in California (Jan. 4)

[January 04, 2013]

U.S. Patents Awarded to Inventors in California (Jan. 4)

(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Jan. 4 -- The following federal patents were awarded to inventors in California.

*** Alpha & Omega Semiconductor Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Alpha & Omega Semiconductor, Sunnyvale, Calif., has been assigned a patent (8,344,499) developed by Yuping Gong, Shanghai, China, and Yan Xun Xue, Los Gatos, Calif., for a chip-exposed semiconductor device.


The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of making a chip-exposed semiconductor package comprising the steps of: plating a plurality of electrode on a front face of each chip on a wafer; grinding a backside of the wafer and depositing a back metal then separating each chips; mounting the chips with the plating electrodes adhering onto a front face of a plurality of paddle of a leadframe; adhering a tape on the back metal and encapsulating with a molding compound; removing the tape and sawing through the leadframe and the molding compound to form a plurality of packaged semiconductor devices." The patent application was filed on March 16, 2012 (13/421,864). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,499&OS=8,344,499&RS=8,344,499 Written by Arpi Sharma; edited by Anand Kumar.

*** Altera Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Altera, San Jose, Calif., has been assigned a patent (8,344,496) developed by Thomas Henry White, Santa Clara, Calif., Giles V. Powell, Alameda, Calif., and Rakesh H. Patel, Cupertino, Calif., for "distributing power with through-silicon-vias." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An integrated circuit with distributed power using through-silicon-vias (TSVs) is presented. The integrated circuit has conducting pads for providing power and ground located within the peripheral region of the top surface. A number of through-silicon-vias are distributed within the peripheral region and a set of TSVs are formed within the non-peripheral region of the integrated circuit. Conducting lines on the bottom surface are coupled between each peripheral through-silicon-via and a corresponding non-peripheral through-silicon-via. Power is distributed from the conducting pads to the TSVs within the non-peripheral region through the TSVs within the peripheral region, thus supplying power and ground to circuits located within the non-peripheral region of the integrated circuit chip." The patent application was filed on April 29, 2009 (12/432,601). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,496&OS=8,344,496&RS=8,344,496 Written by Arpi Sharma; edited by Anand Kumar.

*** ACEA Biosciences Assigned Patent ALEXANDRIA, Va., Jan. 4 -- ACEA Biosciences, San Diego, has been assigned a patent (8,344,742) developed by Yama A. Abassi, San Diego, Xiaobo Wang, San Diego, and Xiao Xu, San Diego, for a "real time electronic cell sensing system and applications for cytotoxicity profiling and compound assays." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The invention provides methods of investigating a mechanism of action of a compound, which includes providing a device for monitoring cell-substrate impedance; attaching the device to an impedance analyzer; adding cells to two or more wells; adding a test compound to at least one of the wells and providing at least one control well; monitoring impedance of the wells to obtain a series of impedance measurements; plotting impedance measurements to obtain impedance curves and comparing the impedance curves to determine a time frame at which the test compound has a significant effect on cell growth or behavior. Determining the time frame provides information on changes in cell status in response to the test compound, including cell attachment or adhesion status, cell growth or proliferation status, the number of viable or dead cells, cytoskeletal organization or structure, and the number of cells going through apoptosis or necrosis." The patent application was filed on Jan. 21, 2011 (13/011,725). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,742&OS=8,344,742&RS=8,344,742 Written by Arpi Sharma; edited by Anand Kumar.

*** Tabula Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Tabula, Santa Clara, Calif., has been assigned a patent (8,344,755) developed by Trevis Chandler, San Francisco, Jason Redgrave, Mountain View, Calif., and Martin Voogel, Los Altos, Calif., for a configuration context switcher.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data." The patent application was filed on Sept. 8, 2008 (12/676,892). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,755&OS=8,344,755&RS=8,344,755 Written by Arpi Sharma; edited by Anand Kumar.

*** tau-Metrix Assigned Patent ALEXANDRIA, Va., Jan. 4 -- tau-Metrix, Fremont, Calif., has been assigned a patent (8,344,745) developed by five co-inventors for a "test structures for evaluating a fabrication of a die or a wafer." The co-inventors are Majid Aghababazadeh, San Jose, Calif., Jose J. Estabil, Weston, Conn., Nader Pakdaman, Monte Sereno, Calif., Gary L. Steinbrueck, Wappingers, N.Y., and James S. Vickers, San Jose, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of test structures located on an active area of a die of the wafer. The specified performance parameter is known to be indicative of a particular fabrication process in the fabrication. Evaluation information may then be obtained based on a variance of the value of the performance parameter at the plurality of locations. This may be done without affecting a usability of a chip that is created from the die. The evaluation information may be used to evaluate how one or more processes that include the particular fabrication process that was indicated by the performance parameter value was performed." The patent application was filed on Aug. 31, 2006 (11/469,305). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,745&OS=8,344,745&RS=8,344,745 Written by Arpi Sharma; edited by Anand Kumar.

*** University of California Assigned Patent ALEXANDRIA, Va., Jan. 4 -- The University of California, Oakland, Calif., has been assigned a patent (8,344,728) developed by five co-inventors for "systems and methods using nuclear magnetic resonance (NMR) spectroscopy to evaluate pain and degenerative properties of tissue." The co-inventors are Sharmila Majumdar, Alameda, Calif., John Kurhanewicz, South San Francisco, Calif., Jeffrey C. Lotz, San Mateo, Calif., David S. Bradford, Sausalito, Calif., and Kayvan Keshari, Stockton, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "NMR spectroscopy is performed on intervertebral disc tissue. Extent of degeneration is determined based on the NMR spectroscopy. Correlation between NMR spectral regions and at least one of tissue degeneration and pain are made. Accordingly, NMR spectroscopy is used to determine location and/or extent of at least one of degeneration or pain associated with a region of tissue, such as for example in particular disc degeneration, or discogenic pain. NMR spectral peak ratios, such as between N-Acetyl/cho and cho/carb, are readily acquired and analyzed to predict degree of tissue degeneration and/or pain for: tissue samples using HR-MAS spectroscopy; and larger portions of anatomy such as joint segments such as a spine, using clinical 3 T MRI systems with surface head or knee coils; and tissue regions such as discs within spines of living patients using 3 T MRI systems with a surface spine coil, thus providing a completely non-invasive diagnostic toolset and method to image and localize degeneration and/or pain." The patent application was filed on July 27, 2007 (11/829,847). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,728&OS=8,344,728&RS=8,344,728 Written by Arpi Sharma; edited by Anand Kumar.

*** Fairchild Semiconductor Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Fairchild Semiconductor, South Portland, Maine, has been assigned a patent (8,344,767) developed by Dong Li, Shanghai, China, and Hai Tao, Sunnyvale, Calif., for a "low power power-on-reset (POR) circuit." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one general aspect, an apparatus can include a first voltage detect circuit configured to produce an output signal at a first power supply voltage, and configured to be in a non-monitoring state at a second power supply voltage greater than the first power supply voltage. The apparatus can include a second voltage detect circuit configured to change from a non-monitoring state to a monitoring state and configured to produce an output signal at a third power supply voltage between the first power supply voltage and the second power supply voltage. The apparatus can also include a combination circuit configured to produce a power-on-reset signal based on a logical combination of the output signal produced by the first voltage detect circuit and the output signal produced by the second voltage detect circuit." The patent application was filed on Oct. 14, 2010 (12/904,702). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,767&OS=8,344,767&RS=8,344,767 Written by Arpi Sharma; edited by Anand Kumar.

*** QUALCOMM Assigned Patent ALEXANDRIA, Va., Jan. 4 -- QUALCOMM, San Diego, has been assigned a patent (8,344,765) developed by Dongjiang Qiao, San Diego, and Frederic Bossu, San Diego, for a "frequency divider with a configurable dividing ratio." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for dividing the frequency of a signal using a configurable dividing ratio is disclosed. An input signal with a first frequency is received at clocked switches in a frequency divider with a configurable dividing ratio. Non-clocked switches inside the frequency divider are operated to select one of multiple dividing ratios. An output signal is output with a second frequency that is the first frequency divided by the selected dividing ratio." The patent application was filed on July 14, 2010 (12/836,454). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,765&OS=8,344,765&RS=8,344,765 Written by Arpi Sharma; edited by Anand Kumar.

*** Thermo Fisher Scientific Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Thermo Fisher Scientific, Waltham, Mass., has been assigned a patent (8,344,746) developed by Marcos Hernandez, San Jose, Calif., and Enrique L. Riveros, Fremont, Calif., for a "probe interface for electrostatic discharge testing of an integrated circuit." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system, probe interface, and method to test an integrated circuit with an electrostatic discharge signal. The probe interface includes a pulse generation circuit, ground plane, and a relay matrix, while the integrated circuit includes a plurality of contact points. The probe interface is configured proximate to the integrated circuit and the relay matrix is configured to electrically connect at least one of an operative signal, the pulse generation circuit, or the ground plane to a contact point of the integrated circuit. The probe interface is thus configured to provide a shortened path for at least one of the electrostatic discharge signal from the probe interface to the integrated circuit, or to the ground plane from the integrated circuit. The probe interface may selectively electrically connect to up to about thirty-two contact points of the integrated circuit, while the system may include up to about four probe interfaces." The patent application was filed on Sept. 29, 2008 (12/240,393). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,746&OS=8,344,746&RS=8,344,746 Written by Arpi Sharma; edited by Anand Kumar.

*** STEC Assigned Patent ALEXANDRIA, Va., Jan. 4 -- STEC, Santa Ana, Calif., has been assigned a patent (8,344,518) developed by Mark Moshayedi, Newport Coast, Calif., for an "apparatus for stacking integrated circuits." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A multi-chip stack module provides increased circuit density for a given surface chip footprint. Support structures are alternated with standard surface mount type chips to form a stack wherein the support structures electrically interconnect the chips. One aspect is a structure and method for interconnecting a plurality of generally planar chips in a vertical stack such that signals, which are common to the chips, are connected in the stack and signals, which are accessed individually, are separated within the stack." The patent application was filed on June 30, 2010 (12/828,175). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,518&OS=8,344,518&RS=8,344,518 Written by Arpi Sharma; edited by Anand Kumar.

*** Alpha & Omega Semiconductor Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Alpha & Omega Semiconductor, Sunnyvale, Calif., has been assigned a patent (8,344,519) developed by Jun Lu, San Jose, Calif., Allen Chang, Fremont, Calif., and Xiaotian Zhang, San Jose, Calif., for a "stacked-die package for battery power management." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A battery protection package assembly is disclosed. The assembly includes a power control integrated circuit (IC) with pins for a supply voltage input (VCC) and a ground (VSS) on a first side of the power control IC. First and second common-drain metal oxide semiconductor field effect transistors (MOSFETs) are electrically coupled to the power control IC. The power control IC and the first and second common-drain metal oxide semiconductor field effect transistors (MOSFET) are co-packaged on a common die pad. The power control IC is vertically stacked on top of one or more of the first and second common-drain MOSFETs. Leads coupled to a supply voltage input (VCC) and a ground (VSS) of the power control IC are on a first side of the common die pad." The patent application was filed on April 18, 2011 (13/089,065). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,519&OS=8,344,519&RS=8,344,519 Written by Arpi Sharma; edited by Anand Kumar.

*** Kaonetics Technologies Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Kaonetics Technologies, Inyokern, Calif., has been assigned a patent (8,344,727) developed by James Cornwell, Irvine, Calif., for a "directed energy imaging system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An imaging system that uses a directed-energy device can include a directed-energy device configured to generate an excitation signal to impinge a region of interest of a target and excite elements therein and receive resonance signals emitted from the region of interest of the target after the excitation signal is terminated. The directed-energy device can include a charged particle generator configured to generate plural energized particles and a charge transformer configured to receive the plural energized particles that include charged particles from the charged particle generator and to output a wavefront including energized particles that include particles having substantially zero charge. The imaging system can also include plural gradient coils positioned about a bore of a magnet and configured to impress a polarizing magnetic field on a target and a communications interface." The patent application was filed on Oct. 26, 2010 (12/912,274). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,727&OS=8,344,727&RS=8,344,727 Written by Arpi Sharma; edited by Anand Kumar.

*** Intersil Americas Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Intersil Americas, Milpitas, Calif., has been assigned a patent (8,344,777) developed by Weihong Qiu, San Jose, Calif., Chun Cheung, Brooklyn, N.Y., and Emil Chen, Mountain View, Calif., for a "method and apparatus for adaptively modifying a pulse width of a pulse width modulated output." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems, methods, and apparatus for improving steady state operation of a pulse width modulator during transient and soft start events are described herein. An apparatus can include a phase component configured to adaptively modify a pulse width of a first pulse width modulated (PWM) output signal based on a pulse width of a PWM input signal. Further, the apparatus can include a power stage component configured to source at least one of a voltage or a current to a load based on the first PWM output signal. In one example, the phase component can be configured to linearly extend the pulse width of the first PWM output signal based on the pulse width of the PWM input signal. In another example, the phase component can be configured to adaptively modify the pulse width of the first PWM output signal based on a predetermined maximum pulse width." The patent application was filed on Aug. 17, 2010 (12/858,181). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,777&OS=8,344,777&RS=8,344,777 Written by Arpi Sharma; edited by Anand Kumar.

*** Advantest America Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Advantest America, San Jose, Calif., has been assigned a patent (8,344,748) developed by Melvin Khoo, San Gabriel, Calif., Ting Hu, Monrovia, Calif., and Matthew Losey, Alta Loma, Calif., for a "probe for testing semiconductor devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A novel hybrid probe design is presented that comprises a torsion element and a bending element. These elements allow the probe to store the displacement energy as torsion or as bending. The novel hybrid probe comprises a probe base, a torsion element, a bending element, and a probe tip. The probe elastically deforms to absorb the displacement energy as the probe tip contacts the DUT contact pad. The bending element absorbs some of the displacement energy through bending. Because the torsion element and the bending element join at an angle between -90 degrees and 90 degrees, a portion of the displacement energy is transferred to the torsion element causing it to twist (torque). The torsion element can also bend to accommodate the storage of energy through torsion and bending. Also, adjusting the position of a pivot can be manipulated to alter the energy absorption characteristics of the probe. One or more additional angular elements may be added to change the energy absorption characteristics of the probe. And, the moment of inertia for the torsion and/or bending elements can by manipulated to achieve the desired probe characteristics. Other features include a various union angle interface edge shapes, pivot cutouts and buffers." The patent application was filed on Jan. 25, 2010 (12/693,428). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,748&OS=8,344,748&RS=8,344,748 Written by Arpi Sharma; edited by Anand Kumar.

*** Tyco Electronics Assigned Patent for Guide System for a Card Module ALEXANDRIA, Va., Jan. 4 -- Tyco Electronics, Berwyn, Pa., has been assigned a patent (8,345,426) developed by Robert Paul Nichols, Santa Rosa, Calif., for a "guide system for a card module." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A guide system is provided for an electronic device having a card module mated with a header. The guide system includes a guide rail configured to guide the card module for mating with the header of the electronic device. The guide rail includes a main wall extending along a longitudinal axis between a front end and a rear end positioned proximate to the header. The guide rail also includes board guides extending from the main wall along the longitudinal axis that are configured to engage a card module circuit board or board guide of the card module to guide the card module to the header. The guide rail also includes heat sink flanges extending from the main wall along the longitudinal axis that are configured to engage a heat sink of the card module to dissipate heat from the heat sink to the main wall." The patent application was filed on Aug. 16, 2010 (12/857,127). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,426&OS=8,345,426&RS=8,345,426 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Force10 Networks Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Force10 Networks, San Jose, Calif., has been assigned a patent (8,345,536) developed by Srikanth Rao, Fremont, Calif., and Viswanathan Raman, San Jose, Calif., for "multicast high availability enhancements for non-stop forwarding." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A distributed-forwarding router platform contains a master and a standby route processing manager (RPM). The master RPM uses dynamic internal routing codes to facilitate the replication of multicast packets within the router. As internal routing codes are assigned, the assignments are shared with the standby RPM. Should the standby RPM have to take over as the master RPM, the new master consults the internal routing codes assigned by the previous master as the new master builds multicast state, insuring that the internal routing codes the new master assigns are consistent with those used by the prior master. This allows the multicast forwarding plane to remain available during RPM failover, without a shutdown or unstable period while the new master RPM propagates internal routing codes. Other embodiments are also described and claimed." The patent application was filed on Jan. 29, 2009 (12/322,159). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,536&OS=8,345,536&RS=8,345,536 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Intel Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Intel, Santa Clara, Calif., has been assigned a patent (8,345,491) developed by Satish K. Damaraju, El Dorado Hills, Calif., Ak R. Ahmed, Rancho Cordova, Calif., and Scott E. Siers, Elk Grove, Calif., for a memory cell write.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of a memory cell comprising a voltage module configured to supply a first supply voltage and a second supply voltage, a data node programming module configured to receive the first supply voltage and to program a data node based at least in part on a write data line, and a complementary data node programming module configured to receive the second supply voltage and to program a complementary data node based at least in part on a complementary write data line, wherein the voltage module is configured such that the first supply voltage is substantially different from the second supply voltage for a period of time while the memory device is being programmed. Additional variants and embodiments may also be disclosed and claimed." The patent application was filed on Oct. 26, 2011 (13/282,331). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,491&OS=8,345,491&RS=8,345,491 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Micron Technology Assigned Patent for Methods for Segmented Programming and Memory Devices ALEXANDRIA, Va., Jan. 4 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,345,482) developed by Jung-Sheng Hoei, Fremont, Calif., for "methods for segmented programming and memory devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods for segmented programming, program verify, and memory devices are disclosed. One such method for programming includes biasing memory cells with a programming voltage and program verifying the memory cells with a plurality of ramped voltage signal segments, wherein each ramped voltage signal segment has a different start voltage and a different end voltage than the other ramped voltage signal segments." The patent application was filed on Dec. 15, 2010 (12/968,714). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,482&OS=8,345,482&RS=8,345,482 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Micron Technology Assigned Patent for Use of Emerging Non-volatile Memory Elements with Flash Memory ALEXANDRIA, Va., Jan. 4 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,345,478) developed by Ramin Ghodsi, Cupertino, Calif., for "use of emerging non-volatile memory elements with flash memory." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Memory devices and methods of operating memory devices are provided, such as those that involve a memory architecture that replaces typical static and/or dynamic components with emerging non-volatile memory (NV) elements. The emerging NV memory elements can replace conventional latches, can serve as a high speed interface between a flash memory array and external devices and can also be used as high performance cache memory for a flash memory array." The patent application was filed on Feb. 22, 2011 (13/031,966). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,478&OS=8,345,478&RS=8,345,478 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Kolo Technologies Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Kolo Technologies, San Jose, Calif., has been assigned a patent (8,345,513) developed by Yongli Huang, San Jose, Calif., for stacked transducing devices.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Implementations include a capacitive micromachined ultrasonic transducer (CMUT) having an additional transducing device overlaid in a vertically stacked relationship. In some implementations the additional transducing device is a second CMUT configured to operate at a different frequency from the first CMUT." The patent application was filed on Dec. 3, 2008 (12/745,749). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,513&OS=8,345,513&RS=8,345,513 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Force10 Networks Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Force10 Networks, San Jose, Calif., has been assigned a patent (8,345,439) developed by Joel R. Goergen, Maple Grove, Minn., and Donald Lewis, Richmond, Calif., for a "modular chassis arrangement with redundant logic power delivery system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A modular packet network device has a chassis in which multiple logic cards mate to the front side of an electrical signaling backplane. Logic power for the logic cards is supplied from a group of power converter cards that convert primary power to the logic voltages required by the logic cards. The power converter cards lie in a separate cooling path behind the backplane. Advantages achieved in at least some of the embodiments include removing primary power planes from the signaling backplane or portion of the backplane, providing redundant, upgradeable power modules whose individual failure does not cause logic card failure, and providing cool air to power converter circuits that would be subject to only heated air if located on the logic cards. Other embodiments are also described and claimed." The patent application was filed on Nov. 18, 2008 (12/313,265). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,439&OS=8,345,439&RS=8,345,439 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Calix Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Calix, Petaluma, Calif., has been assigned a patent (8,345,540) developed by Michael T. Rollins, Santa Rosa, Calif., for "virtual snooping bridge in computer networks." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In general, techniques are described for implementing a virtual snooping bridge in computer networks. The techniques may be implemented by a ring network comprised of a plurality of ring network devices arranged in a ring topology. In one aspect, a ring network device coupled to an adjacent device that provides access to multicast content implements the techniques. This ring network device comprises one or more ports and a control unit. The ports receive ring messages from one or more of the other ring network devices in accordance with a group management ring protocol (GMRP). The ring messages indicate operations requested by one or more host devices with respect to delivery of content of the multicast group. The control unit then presents the received operations to the adjacent network device such that, from the perspective of the adjacent network device, the ring network appears as a single layer two network device." The patent application was filed on April 13, 2010 (12/759,362). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,540&OS=8,345,540&RS=8,345,540 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Intel Assigned Patent for Three-terminal Ovonic Threshold Switch as a Current Driver in a Phase Change Memory ALEXANDRIA, Va., Jan. 4 -- Intel, Santa Clara, Calif., has been assigned a patent (8,345,472) developed by Jong-Won Lee, San Francisco, and Gianpaolo Spadini, Scotts Valley, Calif., for a "three-terminal ovonic threshold switch as a current driver in a phase change memory." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A three-terminal Ovonic Threshold Switch (OTS) is used to provide current to a Phase Change Memory Switch (PCMS) cross point array. The current is started by sending a small current into the second terminal of the three-terminal OTS allowing a larger current to flow from the first terminal to the third terminal of the three-terminal OTS. A method of making the three-terminal OTS is also presented." The patent application was filed on Dec. 21, 2010 (12/974,424). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,472&OS=8,345,472&RS=8,345,472 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Verizon Patent and Licensing Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (8,345,546) developed by Yee Sin Chan, San Jose, Calif., and Jin Yang, Orinda, Calif., for "dynamic machine-to-machine communications and scheduling." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method may include obtaining traffic loading and resource utilization information associated with a network for the network time domain; obtaining machine-to-machine resource requirements for machine-to-machine tasks using the network; receiving a target resource utilization value indicative of a network resource limit for the network time domain; calculating a probability for assigning each machine-to-machine task to the network time domain, wherein the probability is based on a difference between the target resource utilization value and the traffic loading and resource utilization associated with the network; calculating a probability density function based on an independent and identically distributed random variable; generating a schedule of execution of the machine-to-machine tasks within the network time domain based on the probabilities associated with the machine-to-machine tasks and the probability density function; and providing the schedule of execution of the machine-to-machine tasks." The patent application was filed on July 13, 2010 (12/834,985). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,546&OS=8,345,546&RS=8,345,546 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** U.S. Navy Assigned Patent ALEXANDRIA, Va., Jan. 4 -- The U.S. Navy has been assigned a patent (8,345,511) developed by Richard J. Rikoski, Alameda, Calif., for a "blazed array for broadband transmission/reception." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A broadband blazed array has a plurality of elements. The elements are arranged side-by-side in a non-parallel spaced apart fashion with center-to-center spacing between adjacent elements being identical along cross-sections of the array that are aligned with the array's endfire directions." The patent application was filed on March 15, 2010 (12/798,168). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,511&OS=8,345,511&RS=8,345,511 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Micron Technology Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,345,486) developed by Frankie F. Roohparvar, Monte Sereno, Calif., for a "programming a memory device to increase data reliability." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods for programming a memory array, memory devices, and memory systems are disclosed. In one such method, the target reliability of the data to be programmed is determined. The relative reliability of different groups of memory cells of the memory array is determined. The data is programmed into the group of memory cells of the array having a relative reliability corresponding to the target reliability." The patent application was filed on Nov. 29, 2011 (13/305,906). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,486&OS=8,345,486&RS=8,345,486 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Aplus Flash Technology Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Aplus Flash Technology, San Jose, Calif., has been assigned a patent (8,345,481) developed by Peter Wung Lee, Saratoga, Calif., Fu-Chang Hsu, San Jose, Calif., and Hsing-Ya Tsao, San Jose, Calif., for a "NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory array." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A NOR flash nonvolatile memory or reconfigurable logic device has an array of NOR flash nonvolatile memory circuits that includes charge retaining transistors serially connected in a NAND string such that at least one of the charge retaining transistors functions as a select gate transistor to prevent leakage current through the charge retaining transistors when the charge retaining transistors is not selected for reading. The topmost charge retaining transistor's drain is connected to a bit line parallel to the charge retaining transistors and the bottommost charge retaining transistor's source is connected to a source line and is parallel to the bit line. The charge retaining transistors are programmed and erased with a Fowler-Nordheim tunneling process." The patent application was filed on Oct. 25, 2011 (13/317,678). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,481&OS=8,345,481&RS=8,345,481 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Western Digital Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Western Digital, Fremont, Calif., has been assigned a patent (8,345,519) developed by Tzong-Shii Pan, San Jose, Calif., for a "method and system for providing a suspension head bond pad design." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and system for providing a head gimbal assembly (HGA) for an energy assisted magnetic recording (EAMR) disk drive including media is described. The HGA includes a slider, a laser assembly, and a flexure. The slider has a front side, a back side, and at least one EAMR transducer residing in proximity to the front side. The front side corresponds to an air-bearing surface (ABS) that resides in proximity to the media during use. The laser assembly includes a laser for providing energy to the EAMR transducer and is mounted on the back side of the slider. The flexure has at least one laser lead and a through-hole therein. The through-hole is configured to accommodate the laser assembly. A portion of the at least one laser lead extends over the through-hole and electrically connects the at least one laser lead with the laser." The patent application was filed on Dec. 22, 2010 (12/976,826). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,519&OS=8,345,519&RS=8,345,519 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Hex Holdings Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Hex Holdings, Oxnard, Calif., has been assigned a patent (8,345,412) developed by Daniel J. Maravilla, Simi Valley, Calif., and Anthony T. Valladares, Thousand Oaks, Calif., for a "wrist band for portable electronic devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A wrist band for holding a portable electronic device, namely an Apple.RTM. iPod.RTM. Nano.TM. device, having a display screen and control buttons. The wrist band includes a band portion for engaging with a user's wrist, and a case portion formed of soft and pliable material with a cavity sized to receive and retain the electronic device, a perimeter rim with button controllers that are aligned with the control buttons of the electronic device, and a retainer to retain the electronic device in place in the cavity. The case portion includes an earphone jack aperture and a jack clip which is detachably attachable with the earphone jack aperture, and which jack clip is adapted to be inserted into the earphone jack aperture and block a jack plug of the portable electronic device when in a first position, and which is adapted to be removed from the earphone jack aperture and the jack plug of the portable electronic device when in a second position." The patent application was filed on Nov. 12, 2010 (12/945,802). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,412&OS=8,345,412&RS=8,345,412 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Broadcom Assigned Patent for Method and System for Inverse Telecine and Scene Change Detection of Progressive Video ALEXANDRIA, Va., Jan. 4 -- Broadcom, Irvine, Calif., has been assigned a patent (8,345,148) developed by Frederick Walls, Norristown, Pa., and Richard Hayden Wyman, Sunnyvale, Calif., for a "method and system for inverse telecine and scene change detection of progressive video." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Certain aspects of a method and system for inverse telecine and scene change detection of progressive video may include determining a cadence, for example, 3:2 or 2:2 pulldown, and phase of received progressive input pictures. A difference between two or more consecutive received progressive input pictures may be determined. The motion compensation of a plurality of output pictures may be controlled based on the determined cadence, phase and difference between two or more consecutive received progressive input pictures. The system may be enabled to determine repeated pictures and scene changes. The motion compensation of output pictures may be stopped during detected scene changes." The patent application was filed on Nov. 7, 2007 (11/936,539). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,148&OS=8,345,148&RS=8,345,148 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Disney Enterprises Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Disney Enterprises, Burbank, Calif., has been assigned a patent (8,345,171) developed by Scott Frazier Watson, Marina del Rey, Calif., and Gary Todd Masilko, South Pasadena, Calif., for "changing channels in a digital broadcast system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, systems, and apparatus, including computer program products, for changing digital broadcast channels. In one implementation, upon receiving a request for switching to a new channel in a digital broadcast receiving device, the device switches from a power saving mode, in which the device processes time-slices only for the currently selected broadcast channel, to a channel changing mode, in which broadcast data is buffered for more than one broadcast channels in anticipation of channel surfing. In another implementation, the user's perception of the channel change delay is mitigated by displaying channel information about the newly selected channel." The patent application was filed on March 25, 2011 (13/072,601). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,171&OS=8,345,171&RS=8,345,171 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Vertex Pharmaceutical Assigned Patent for Process for Preparing Modulators of Cystic Fibrosis Transmembrane Conductance Regulator ALEXANDRIA, Va., Jan. 4 -- Vertex Pharmaceutical, Cambridge, Mass., has been assigned a patent (8,344,147) developed by eight co-inventors for a "process for preparing modulators of cystic fibrosis transmembrane conductance regulator." The co-inventors are Narendra Bhalchandra Ambhaikar, Hyderabad, India, Robert Hughes, San Diego, Dennis James Hurley, San Marcos, Calif., Elaine Chungmin Lee, Cambridge, Mass., Benjamin Littler, Carlsbad, Calif., Mehdi Numa, San Diego, Stefanie Roeper, Cambridge, Mass., and Urvi Sheth, San Diego.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention relates to processes for preparing solid state forms of N-(4-(7-azabicyclo[2.2.1]heptan-7-yl)-2-(trifluoromethyl)phenyl)- -4-oxo-5-(trifluoromethyl)-1, 4-dihydroquinoline-3-carboxamide, including Compound 1 Form A, Compound 1 Form A-HCl, Compound 1 Form B, and Compound 1 Form B-HCl, any combination of these forms, pharmaceutical compositions thereof, and methods of treatment therewith." The patent application was filed on Oct. 21, 2010 (12/909,750). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,344,147&OS=8,344,147&RS=8,344,147 Written by Neha Bharti; edited by Jaya Anand.

*** Chevron USA Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Chevron USA, San Ramon, Calif., and Los Alamos National Security, Los Alamos, N.M., have been assigned a patent (8,345,509) developed by eight co-inventors for "system and method to create three-dimensional images of non-linear acoustic properties in a region remote from a borehole." The co-inventors are Cung Vu, Houston, Kurt T. Nihei, Oakland, Calif., Denis P. Schmitt, Dhahran, Saudi Arabia, Christopher Skelt, Houston, Paul A. Johnson, Santa Fe, N.M., Robert Guyer, Reno, Nev., James A. TenCate, Los Alamos, N.M., and Pierre-Yves Le Bas, Los Alamos, N.M.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In some aspects of the disclosure, a method for creating three-dimensional images of non-linear properties and the compressional to shear velocity ratio in a region remote from a borehole using a conveyed logging tool is disclosed. In some aspects, the method includes arranging a first source in the borehole and generating a steered beam of elastic energy at a first frequency; arranging a second source in the borehole and generating a steerable beam of elastic energy at a second frequency, such that the steerable beam at the first frequency and the steerable beam at the second frequency intercept at a location away from the borehole; receiving at the borehole by a sensor a third elastic wave, created by a three wave mixing process, with a frequency equal to a difference between the first and second frequencies and a direction of propagation towards the borehole; determining a location of a three wave mixing region based on the arrangement of the first and second sources and on properties of the third wave signal; and creating three-dimensional images of the non-linear properties using data recorded by repeating the generating, receiving and determining at a plurality of azimuths, inclinations and longitudinal locations within the borehole. The method is additionally used to generate three dimensional images of the ratio of compressional to shear acoustic velocity of the same volume surrounding the borehole." The patent application was filed on May 11, 2009 (12/463,802). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,509&OS=8,345,509&RS=8,345,509 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Cisco Technology Assigned Patent for Dynamic Management of Picture Quality in a Video Conference with Diversified Constraints ALEXANDRIA, Va., Jan. 4 -- Cisco Technology, San Jose, Calif., has been assigned a patent (8,345,083) developed by Shantanu Sarkar, San Jose, Calif., and Arturo A. Rodriguez, Norcross, Ga., for "dynamic management of picture quality in a video conference with diversified constraints." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment, a method dynamically configures a BL bandwidth in a conference based on bandwidth capabilities in the video conferencing network. In one embodiment, the conference may include any combination of endpoints characterized as BL endpoints and SVCL endpoints. The method includes determining one or more bandwidth capabilities for a plurality of endpoints participating in a conference. The bandwidth capabilities for each respective endpoint may be based on its video decoding capability, the maximum bit-rate it can accept, the video encoding capability of the other endpoints, or a bandwidth constraint manifestation in a portion of the network, etc." The patent application was filed on July 31, 2007 (11/831,729). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,083&OS=8,345,083&RS=8,345,083 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Headway Technologies Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Headway Technologies, Milpitas, Calif., and SAE Magnetics, Hong Kong, have been assigned a patent (8,345,384) developed by six co-inventors for a "magnetic head for perpendicular magnetic recording having a main pole and a shield." The co-inventors are Yoshitaka Sasaki, Santa Clara, Calif., Hiroyuki Ito, Milpitas, Calif., Kazuki Sato, Milpitas, Calif., Shigeki Tanemura, Milpitas, Calif., Hironori Araki, Milpitas, Calif., and Atsushi Iijima, Hong Kong.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A main pole has a top surface and a bottom end that each include first, second, and third portions arranged contiguously in this order of increasing distance from a medium facing surface. A first virtual plane and a second virtual plane are assumed. The first virtual plane passes through an end of an end face of the main pole located forward in the direction of travel of a recording medium and is perpendicular to the medium facing surface and to the direction of travel of the recording medium. The second virtual plane passes through an end of the end face of the main pole located backward in the direction of travel of the recording medium and is perpendicular to the medium facing surface and to the direction of travel of the recording medium. The first and third portions are inclined relative to the first and second virtual planes and the medium facing surface. The second portion is parallel to the first and second virtual planes." The patent application was filed on Dec. 2, 2011 (13/310,192). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,384&OS=8,345,384&RS=8,345,384 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Tatung Company of America Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Tatung Company of America, Long Beach, Calif., has been assigned a patent (8,345,079) developed by Jeffrey Delos Reyes, Harbor City, Calif., and Ping-Huang Tsai, Temple City, Calif., for a "camera service port and remote camera system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A camera service port has an automatic termination for connecting to a near-side monitor. The camera service includes an audio jack and a phone jack. The audio jack includes first and second terminals for receiving signals from a camera and connecting to the near-side monitor. The phone jack includes a first connector coupled to the camera, an equivalent resistor coupled to the first connector, and a second connector coupled to the camera. The second connector is flexible to connect to the first terminal without being connected to an equivalent resistor. When the audio jack is plugged into the phone jack, the first terminal is coupled to the second connector and the second terminal is coupled to the first connector for receiving the signal from the camera. When the audio jack is not plugged into the phone jack, the equivalent resistor is coupled between the second connector and the first connector." The patent application was filed on Aug. 18, 2008 (12/193,671). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,079&OS=8,345,079&RS=8,345,079 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** X-Rite Assigned Patent ALEXANDRIA, Va., Jan. 4 -- X-Rite, Grand Rapids, Mich., has been assigned a patent (8,345,252) developed by four co-inventors for a "method and system for enhanced formulation and visualization rendering." The co-inventors are Jon Kenneth Nisper, Grand Rapids, Mich., Thomas M. Richardson, Ada, Mich., Marc S. Ellens, Grand Rapids, Mich., and Changbo Huang, San Francisco.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus for measuring a spatially under-sampled Bidirectional Reflectance Distribution Function (BRDF) of a surface. The apparatus may comprise a first light source directed to illuminate the surface from a first illumination direction, and a plurality of sensors positioned to receive light reflected by the surface. The plurality of sensors may comprise first, second and third sensors positioned to receive light reflected by the surface in first, second and third non-coplanar directions. In various embodiments, the apparatus may also comprise a computer in communication with the plurality of sensors. The computer is configured to convert light sensed by the plurality of sensors into a first appearance property of the surface considering the first, second, and third reflectance directions. A method of calculating xDNA, the vector sum of the observed reflectance intensity over a plurality of wavelengths and angles. Methods of using the calculated xDNA for formulating recipes for a surfaces colors. Furthermore, a method for using the calculated xDNA for rendering the surface color." The patent application was filed on March 10, 2009 (12/401,129). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,252&OS=8,345,252&RS=8,345,252 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Analog Devices Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Analog Devices, Norwood, Mass., has been assigned a patent (8,345,394) developed by seven co-inventors for an "ESD protection circuit for a switching power converter." The co-inventors are James W. Zhao, San Francisco, Reed W. Adams, Mountain View, Calif., Kenji Tomiyoshi, Mihama-Ku Chiba, Japan, Bin Shao, Shanghai, China, Atsushi Matamura, Tokyo, Yogesh Sharma, Santa Clara, Calif., and Todd Thomas, San Jose, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An ESD protection circuit for a switching power converter which includes a high-side switching element connected between a supply voltage and the switching node, and a low-side switching element connected between the switching node and a common node. A current conduction path couples an ESD event that occurs on the switching node to an ESD sense node, and an ESD sensing circuit coupled to the sense node generates a trigger signal when an ESD event is sensed. A first logic gate keeps the high-side switching element off when the trigger signal indicates the sensing of an ESD event, and a second logic gate causes the low-side switching element to turn on when an ESD event is sensed such that the low-side switching element provides a conductive discharge path between the switching node and common node." The patent application was filed on Oct. 5, 2009 (12/573,501). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,394&OS=8,345,394&RS=8,345,394 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Displayed View Modification in a Vehicle-to-vehicle Network ALEXANDRIA, Va., Jan. 4 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,345,098) developed by four co-inventors for a "displayed view modification in a vehicle-to-vehicle network." The co-inventors are Travis M. Grigsby, Austin, Texas, Steven Michael Miller, Cary, N.C., Pamela Ann Nesbitt, Tampa, Fla., and Lisa Anne Seacat, San Francisco.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In V2V or other networks in which multiple video cameras can share video data, a user may elect to modify a primary view by electronically "removing" obstructing objects from the primary view. The user begins by identifying the objects to be electronically removed from the simulated view, either by designating the boundaries of the objects or by identifying classes of objects to be removed. Pel locations associated with obstructing objects are identified in the primary data set. Video data provided by cameras other than a primary video camera is analyzed to identify common features in the primary and secondary views and to identify pels that correspond with object-associated pels in the primary view. A merged data set, consisting of pel data from the primary data set and from at least one of the secondary data sets, provides the video data presented in the simulated view." The patent application was filed on March 17, 2008 (12/049,436). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,098&OS=8,345,098&RS=8,345,098 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Linear Technology Assigned Patent ALEXANDRIA, Va., Jan. 4 -- Linear Technology, Milpitas, Calif., has been assigned a patent (8,345,391) developed by William Hall Coley, Cary, N.C., and Kurk David Matthews, Menlo Park, Calif., for a "DC/DC converter overcurrent protection." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A DC/DC converter and a method protect a MOSFET driven by the converter from overcurrent conditions. No extra pins are required to sense the current, which saves IC package area and cost." The patent application was filed on Sept. 16, 2010 (12/883,876). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,391&OS=8,345,391&RS=8,345,391 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Apple Assigned Patent for Handheld Computing Device ALEXANDRIA, Va., Jan. 4 -- Apple, Cupertino, Calif., has been assigned a patent (8,345,410) developed by four co-inventors for a handheld computing device. The co-inventors are John P. Ternus, Redwood City, Calif., Stephen R. McClure, San Francisco, Joshua D. Banko, Palo Alto, Calif., and Ming Yu, Saratoga, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A portable computing device is disclosed. The portable computing device can take many forms such as a laptop computer, a tablet computer, and so on. The portable computing device can include at least a single piece housing. The single piece housing including a plurality of steps. The plurality of mounting steps is formed by at least removing a preselected amount of housing material at predetermined locations on the interior surface. At least some of the mounting steps are used to mount at least some of the plurality of internal operating components to the housing." The patent application was filed on Jan. 26, 2010 (12/694,085). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,410&OS=8,345,410&RS=8,345,410 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Headway Technologies Assigned Patent for Method to Make an Integrated Side Shield PMR Head with Non-conformal Side Gap ALEXANDRIA, Va., Jan. 4 -- Headway Technologies, Milpitas, Calif., has been assigned a patent (8,345,383) developed by four co-inventors for a "method to make an integrated side shield PMR head with non-conformal side gap." The co-inventors are Cherng-Chyi Yan, San Jose, Calif., Feiyue Li, Fremont, Calif., Shiwen Huang, Fremont, Calif., Jiun-Ting Lee, Sunnyvale, Calif., and Yoshitaka Sasaki, Santa Clara, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A non-conformal integrated side shield structure is disclosed for a PMR write head wherein the sidewalls of the side shield are not parallel to the pole tip sidewalls. Thus, the side gap distance between the leading pole tip edge and side shield is different than the side gap distance between the trailing pole tip edge and side shield. As a result, there is a reduced side fringing field and improved overwrite performance. The side gap distance is constant with increasing distance from the ABS along the main pole layer. A fabrication method is provided where the trailing shield and side shield are formed in the same step to afford a self-aligned shield structure. Adjacent track erasure induced by flux choking at the side shield and trailing shield interface can be eliminated by this design. The invention encompasses a tapered main pole layer in a narrow pole tip section." The patent application was filed on Sept. 22, 2011 (13/200,305). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,345,383&OS=8,345,383&RS=8,345,383 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** General Photonics Assigned Patent ALEXANDRIA, Va., Jan. 4 -- General Photonics, Chino, Calif., has been assigned a patent (8,345,238) developed by Xiaotian Steve Yao, Diamond Bar, Calif., for a "measuring optical spectral property of light based on polarization analysis." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A device for measuring spectrum of light includes a differential group delay (DGD) device positioned to receive light under measurement and to produce output light with a DGD value representing a difference in the group delay between two orthogonal optical polarizations of the light under measurement. An optical detector is positioned to receive the output light from the DGD device to measure a state and a degree of polarization of the output light. A processing device receives and processes measurements of the state and the degree of polarization from For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; editor@targetednews.com; http://targetednews.com.

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